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W91530N SERIES 13-MEMORY TONE/PULSE DIALER WITH SAVE, KEYTONE, LOCK, AND HANDFREE FUNCTIONS
GENERAL DESCRIPTION
The W91530N series are tone/pulse switchable telephone dialers with 13 memories, keytone or lock, and handfree dialing control. These chips are fabricated using Winbond's high-performance CMOS technology and thus offer good performance in low-voltage, low-power operations.
FEATURES
* * * * * * * * * * * * * * * * * * * * * *
DTMF/pulse switchable dialer Two by 32 digits redial and save memory Three by 16 digits one-touch direct repertory memory Ten by 16 digits two-touch indirect repertory memory Pulse-to-tone (*/T) keypad for long distance call operation Cascaded dialing Uses 5 x 5 keyboard Easy operation with redial, flash, pause, and */T keypads Pause, PT (pulse-to-tone) can be stored as a digit in memory 0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out Dialing rate (10 ppS or 20 ppS) selectable by bonding option Minimum tone output duration: 93 mS (W91534AN: 87 mS) Minimum intertone pause: 93 mS (W91534AN: 87 mS) Pause time: 3.6 sec. 300 mS off-hook delay in lock mode (DP remains low for 300 mS while off hook) Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 mS Make/break ratio (2:3 or 1:2) selectable by MODE pin Key tone output for valid keypad entry recognition On-chip power-on reset Uses 3.579545 MHz crystal or ceramic resonator 18 or 20-pin dual-in-line plastic package The different dialers in the W91530N series are shown in the following table:
TYPE NO. W91530N W91530AN W91531LN W91531ALN W91532N W91532AN W91534AN REPLACEMENT TYPE NO. W91530 W91531 W91530A W91531A W91531L W91531AL W91532 W91532A New type 10 10 20 20 10 600/300/73/100 600/300/73/100 600/300/73/100 600/300/73/100 600/300/73/100 Pin Pin Pin Pin Pin Yes Yes Yes Yes Yes Yes Yes Yes 18 20 18 20 20 10 600/300/73/100 Pin Yes Yes 20 PULSE (ppS) 10 FLASH (mS) 600/300/73/100 M/B Pin KEY TONE Yes HANDFREE DIALING LOCK PACKAGE (PINS) 18
Note: The W91534AN is for use in France only. In this version, the pause time is not be added in pulse-to-tone function mode.
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Publication Release Date: May 1997 Revision A3
W91530N SERIES
PIN CONFIGURATIONS
C1 C1 C2 C3 C4 KT VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS C2 C3 C4 KT VSS XT XT T/P MUTE HFI
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS HFO
W91530N
W91530AN/532AN/534AN
C1 C1 C2 C3 C4 LOCK VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS C2 C3 C4 LOCK VSS XT XT T/P MUTE HFI
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS HFO
W91531LN
W91531ALN
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W91530N SERIES
PIN DESCRIPTION
SYMBOL ColumnRow Inputs 18-PIN 1-4 & 15-18 20-PIN 1-4 & 17-20 I/O I FUNCTION The keyboard input is compatible with a standard 5 x 5 keyboard, an inexpensive single contact (Form A) keyboard, and electronic input. In normal operation, any single button can be pushed to produce dual tone, pulses, or functions. Activation of two or more buttons will result in no response except for single tone. XT 7 7 I A built-in inverter provides oscillation with an inexpensive 3.579545 MHz crystal. The oscillator ceases when a keypad input is not sensed. The crystal frequency deviation is 0.02%. Crystal oscillator output pin. The T/P MUTE is a conventional CMOS N-channel open drain output. The output transistor is switched on low level during dialing sequence (both pulse and tone mode). Otherwise, it is switched off. MODE 13 15 I Pulling mode pin to VSS places dialer in tone mode. Pulling mode pin to VDD places dialer in pulse mode (10 ppS) with M/B ratio of 40:60 (W91532/532AN is 20 ppS). Leaving mode pin floating places dialer in pulse mode (10 ppS) with M/B ratio of 33.3:66.7 (W91532/532AN is 20 ppS). HKS 10 12 I The HKS (hook switch) input is used to sense whether the handset is on-hook or off-hook. In on-hook state, HKS = 1: chip is in sleeping mode, no operation. In off-hook state, HKS = 0: chip is enabled for normal operation. HKS pin is pulled to VDD by internal resistor. KT 5 5 O
(except (except W91531LN) W91531ALN)
XT T/P MUTE
8 9
8 9
O O
The key tone output is a conventional CMOS inverter. The key tone is generated when any valid key is pressed; the KT pin generates a 1.2 KHz square wave at 35 mS. When no key is pressed, the KT pin remains in low state.
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Publication Release Date: May 1997 Revision A3
W91530N SERIES
Pin Description, continued
SYMBOL LOCK
18-PIN 5
(only for W91531LN)
20-PIN 5
(only for W91531ALN)
I/O I
FUNCTION The function of this terminal is to prevent "0" dialing and "9" dialing under PABX system long distance call control. When the first key input after reset is 0 or 9, all key inputs, including the 0 or 9 key, become invalid and the chip generates no output. The telephone is reinitialized by a reset. The function of the LOCK pin is shown below:
LOCK PIN VDD Floating VSS FUNCTION "0", "9" dialing inhibited Normal dialing mode "0" dialing inhibited
DP / C5
11
13
O
N-channel open drain dialing pulse output. Flash key will cause DP to be active in either tone mode or pulse mode. In lock mode, the DP remains low for 300 mS during offhook delay time. The timing diagram for pulse mode is shown in Figure 1(a, b, c, d). During pulse dialing, this pin remains in low state regardless of keypad input. In tone mode, it will output a dual or single tone. A detailed timing diagram for tone mode is shown in Figure 2(a, b, c, d).
OUTPUT FREQUENCY Specified R1 R2 R3 R4 C1 C2 C3 697 770 852 941 1209 1336 1477 Actual 699 766 848 948 1216 1332 1472 Error % +0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34
DTMF
12
14
O
VDD, VSS
14, 6
16, 6
I
Power input pins for the dialer chip. VDD is the main power and VSS is the ground.
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W91530N SERIES
Pin Description, continued
SYMBOL HFI, HFO
18-PIN -
20-PIN 10, 11
I/O I, O Handfree control pins.
FUNCTION A low pulse on the HFI input pin toggles the handfree control state. Status of the handfree control state is listed in the following table:
CURRENT STATE
HOOK SW. HFO INPUT
NEXT STATE
HFO DIALING
On Hook Off Hook On Hook Off Hook Off Hook
Low High High Low High
HFI HFI HFI Off Hook On Hook On Hook
High Low Low Low Low High
Yes No Yes Yes No Yes
HFI pin is pulled to VDD by an internal resistor. Detailed timing diagram is shown in Figure 3.
BLOCK DIAGRAM
XT XT
HKS HFI
SYSTEM CLOCK GENERATOR
CONTROL ROW (R1 to R4, Vx) KEYBOARD INTERFACE COLUMN (C1 to C4) LOCATION LATCH RAM LOGIC READ/WRITE COUNTER
LOCK MODE
T/P MUTE PULSE CONTROL LOGIC KT DP/C5 HFO
DTMF
D/A CONVERTER
ROW & COLUMN PROGRAMMABLE COUNTER
DATA LATCH & DECODER
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Publication Release Date: May 1997 Revision A3
W91530N SERIES
FUNCTIONAL DESCRIPTION
Keyboard Operation
C1 1 4 7 */T F1
* * * * * * *
C2 2 5 8 0 F2
C3 3 6 9 # F3
C4 S F4 A R/P
DP /C5 M1 M2 M3 SAVE R1 R2 R3 R4 Vx
S: Store function key A: Indirect repertory memory dialing function key R/P: Redial and pause function key */T: * in tone mode and PT key in pulse mode SAVE: Save function key for one-touch 32-digit memory M1, ..., M3: One-touch memory
F1, ..., F4: Flash function keys: F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS, and all flash pause time is 1.0 mS
Note: Mn = M1, ..., M3; Ln = 0, ..., 9, */T, #, Pause.
Normal Dialing
OFF HOOK (or ON HOOK & HFI o ), D1 , D2 , ..., Dn 1. D1, D2, ..., Dn will be dialed out. 2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing.
Redialing
OFF HOOK ON HOOK or , (or ON HOOK & (or , HFI o ON HOOK D1 , D2 ), & D1 , D2 ), , ..., R/P
HFI o
Dn
BUSY, Come
OFF HOOK &
HFI o
HFI o
ON HOOK
, ...,
Dn
, BUSY,
, Come
1. The redial memory content will be D1, D2, ..., Dn. 2. The R/P key can execute the redial function only as first key-in after off-hook; otherwise, it will
execute the pause function.
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W91530N SERIES
Number Store
OFF HOOK , Mn (or (or Ln ON HOOK ) S will be ignored. &
HFI o
),
D1
,
D2
, ...,
Dn
,
S
,
S
1. If the sequence of the dialed digits D1, D2, ..., Dn has not finished,
2. D1, D2, ..., Dn will be dialed out and stored in memory location Mn (or Ln). OFF HOOK , Mn (or (or Ln ON HOOK ) &
HFI o
),
S
,
D1
,
D2
, ...,
Dn
,
S
3. D1, D2, ..., Dn will be stored in memory location Mn (or Ln) but will not be dialed out. 4. R/P digit. mode, and In */T store keys can be stored as a digit in memory, but R/P is the pause function key. R/P key cannot be the first
5. The store mode is released after the store function is executed or when the state of the hook switch changes or the flash function is executed.
Save
OFF HOOK (or ON HOOK &
HFI o
),
D1
,
D2
, ...,
Dn
,
SAVE
1. D1, D2, ..., Dn will be dialed out. 2. If the dialing of D1 to Dn is finished, pressing SAVE will cause D1 to Dn to be
duplicated to save memory. ON HOOK 3. , OFF HOOK (or
HFI o
),
SAVE
D1 to Dn will be dialed out after
SAVE
key is pressed.
Repertory Dialing Procedure
OFF HOOK (or ON HOOK & HFI o ), Mn (or SAVE )
1. The content of memory location Mn (or save) will be dialed out. OFF HOOK (or ON HOOK & HFI o ), A , Ln
2. The content of memory location Ln will be dialed out.
Access Pause
Publication Release Date: May 1997 Revision A3
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W91530N SERIES
OFF HOOK (or ON HOOK &
HFI o
),
D1
,
D2
,
R/P
,
D3
, ...,
Dn
1. The pause function can be stored as a digit in memory. 2. The pause function is executed in normal dialing or redialing or memory dialing. 3. The pause function timing diagram is shown in Figure 4.
Pulse-to-tone (*/T)
OFF HOOK D1' , D2' (or , ..., ON HOOK Dn' &
HFI o
),
D1
,
D2
, ...,
Dn
,
*/T
,
1. If the mode switch is set to pulse mode, then the output signal will be: D1, D2, ..., Dn, Pause, D1', D2', ..., Dn' (Pulse) (Tone) In the case of the W91534AN, the output signal will be: D1, D2, ..., Dn, *, D1', D2', ..., Dn' (Pulse) (Tone) 2. If the mode switch is set to tone mode, then the output signal will be: D1, D2, ..., Dn, * , D1', D2', ..., Dn' (Tone) (Tone) 3. The dialer remains in tone mode when the digits have been dialed out and can be reset to pulse mode only by going on-hook. 4. The function timing diagram is shown in Figure 5.
Flash
OFF HOOK (or ON HOOK &
HFI o
),
Fn
1. Fn = F1, ..., F4. 2. If Fn is pressed, the dialer will execute a flash break time of 600 mS (F1), 300 mS (F2),
73 mS (F3), or 100 mS (F4). The pause time is 1.0 second. 3. Flash key cannot be stored as a digit in memory. The flash key has first priority among keyboard functions. 4. The system will return to the initial state after the flash pause time is finished. 5. The flash function timing diagram is shown in Figure 6.
Cascaded Dialing
OFF HOOK 1. (or ON HOOK &
HFI o
), Normal dialing
Normal dialing + (1st sequence)
Repertory dialing (2nd sequence)
+
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W91530N SERIES
2. Repertory dialing (1st sequence) Redialing (1st sequence) + + Normal dialing + (2nd sequence) + Repertory dialing
3.
*
Normal dialing (2nd sequence)
Repertory dialing
Redialing and save dialing is valid only for the first key-in.
ABSOLUTE MAXIMUM RATINGS
PARAMETER DC Supply Voltage Input/Output Voltage SYMBOL VDD-VSS VIL VIH VOL VOH Power Dissipation Operating Temperature Storage Temperature PD TOPR TSTG RATING -0.3 to +7.0 VSS -0.3 VDD +0.3 VSS -0.3 VDD +0.3 120 -20 to +70 -55 to +150 UNIT V V V V V mW C C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
DC CHARACTERISTICS
(VDD-VSS = 2.5V, Fosc. = 3.58 MHz, TA = 25 C, all outputs unloaded)
PARAMETER Operating Voltage Operating Current Standby Current Memory Retention Current Tone Output Voltage Pre-emphasis DTMF Distortion DTMF Output DC Level
SYMBOL VDD IOP ISB IMR VTO
CONDITIONS Tone Pulse HKS = 0, No load & No key entry HKS = 1, VDD = 1.0V Row group, RL = 5 K Col/Row, VDD = 2.0 to 5.5V RL = 5 K, VDD = 2.0 to 5.5V RL = 5 K, VDD = 2.0 to 5.5V
MIN. 2.0 130 1 1.0
TYP. 0.4 0.2 150 2 -30 -
MAX. 5.5 0.6 0.4 15 0.2 170 3 -23 3.0
UNIT V mA mA A A mVrm s dB dB V
THD VTDC
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Publication Release Date: May 1997 Revision A3
W91530N SERIES
DC Characteristics, continued
PARAMETER DTMF Output Sink Current DP Output Sink Current T/P MUTE Output Sink Current KT Drive/Sink Current HFO Drive/Sink Current H/P MUTE Drive/Sink Current Keypad Input Drive Current Keypad Input Sink Current Keypad Resistance
SYMBOL ITL IPL IML IKTH IKTL IHFH IHFL IHPH IHPL IKD IKS
CONDITIONS VTO = 0.5V VPO = 0.5V VMO = 0.5V VKTH = 2.0V VKTL = 0.5V VHFH = 2.0V VHFL = 0.5V VHPH = 2.0V VHPL = 0.5V VI = 0V VI = 2.5V -
MIN. 0.2 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 4 200 -
TYP. 400 -
MAX. 5.0
UNIT mA mA mA mA mA mA mA mA mA A A K
AC CHARACTERISTICS
PARAMETER Key-in Debounce Key Release Debounce On-hook Debounce Pre-digit Pause1 SYMBOL TKID TKRD TOHD TPDP1 10 ppS Pre-digit Pause2 Interdigit Pause (Auto dialing) Make/Break Ratio M:B TPDP2 20 ppS TIDP Lock Mode Unlock Mode Mode Pin = VDD Mode Pin = Floating Mode Pin = VDD Mode Pin = Floating 10 ppS 20 ppS Mode Pin = VDD Mode Pin = Floating CONDITIONS MIN. TYP. 20 20 20 150 40 33.3 20 16.7 800 500 40:60 33.3:66.7 MAX. UNIT mS mS mS mS mS mS mS mS mS mS % %
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W91530N SERIES
AC Characteristics, continued
PARAMETER Tone Output Duration Intertone Pause Tone Output Duration Intertone Pause Flash Break Time
SYMBOL TTD TITP TTD TITP TFB
CONDITIONS Except for W91534AN Except for W91534AN W91534AN Only W91534AN Only F1 F2 F3 F4
MIN. -
TYP. 93 93 87 87 600 300 73 100 1.0 3.6 1.2 35 600 2.2 300 300
MAX. -
UNIT mS mS mS mS mS
Flash Pause Time Pause Time Key Tone Frequency Key Tone Duration One-key Redialing Pause Time One-key Redialing Break Time Off-hook Delay First Key-in Delay
Notes:
TFP TP FKT TKTD TRP TRB TOFD TFKP Lock Only Lock Only
S S KHz mS mS S mS mS
-
1. Crystal parameters suggested for proper operation are Rs < 100 , Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF, Fosc. = 3.579545 MHz 0.02%. 2. Crystal oscillator accuracy directly affects these times.
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Publication Release Date: May 1997 Revision A3
W91530N SERIES
TIMING WAVEFORMS
< 600 mS
HKS
< 300 mS
TKRD 4 2
MB MB
KEY IN DP T/P MUTE KT DTMF OSC.
3 TKID
2 TKID
TIDP
TIDP TPDP
TIDP TPDP
TIDP
Low
OSCILLATION OSCILLATION
Figure 1(a). Normal Dialing Timing Diagram (Pulse Mode Without Lock Function)
< 600 mS
HKS
< 300 mS
TKRD 4 TKID 2
MB MB
KEY IN DP T/P MUTE KT DTMF OSC.
3 TOFD
2 TKID
TIDP TPDP
TIDP TPDP
TIDP
TFKD
Low
OSCILLATION OSCILLATION
Figure 1(b). Normal Dialing Timing Diagram (Pulse Mode with Lock Function)
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W91530N SERIES
Timing Waveforms, continued
< 600 mS
HKS TKRD KEY IN DP T/P MUTE KT DTMF OSC. Low R/P TKID
MB MB
TIDP TPDP
TIDP
TIDP
OSCILLATION
Figure 1(c). Auto Dialing Timing Diagram (Pulse Mode Without Lock Function)
< 600 mS
HKS KEY IN DP T/P MUTE KT DTMF OSC. Low
300 mS
R/P TKID
MB MB
TOFD
TIDP TPDP
TIDP
TIDP
TFKD
OSCILLATION
Figure 1(d). Auto Dialing Timing Diagram (Pulse Mode with Lock Function)
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Publication Release Date: May 1997 Revision A3
W91530N SERIES
Timing Waveforms, continued
< 600 mS
HKS
< 300 mS
TKRD 4 2 5 2 TKID TITP
TKRD
KEY IN DTMF
3 TKID TTD
TITP
TITP
TITP
T/P MUTE KT DP OSC.
OSCILLATION
High
OSCILLATION OSCILLATION
Figure 2(a). Normal Dialing Timing Diagram (Tone Mode Without Lock Function)
HKS KEY IN DTMF
< 600 mS < 300 mS
TKRD 4 2 5 2 TKID
3
TTD T/P MUTE TFKD KT DP OSC. TOFD
TITP
TITP
TITP
OSCILLATION
OSCILLATION
Figure 2(b). Normal Dialing Timing Diagram (Tone Mode with Lock Function)
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W91530N SERIES
Timing Waveforms, continued
< 600 mS
HKS TKRD KEY IN DTMF TTD T/P MUTE KT DP OSC.
OSCILLATION
R/P TKID
TITP
TITP
Figure 2(c). Auto Dialing Timing Diagram (Tone Mode Without Lock Function)
HKS KEY IN DTMF
< 600 mS TKRD R/P
TTD T/P MUTE KT DP OSC. 300 mS TOFD TFKD
TITP
TITP
OSCILLATION
Figure 2(d) Auto Dialing Timing Diagram (Tone Mode with Lock Function)
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Publication Release Date: May 1997 Revision A3
W91530N SERIES
Timing Waveforms, continued
HKS HFI HFO
ON HOOK
T/P MUTE CHIP ENBLE
High
Figure 3. Handfree Timing Diagram
< 600 mS
HKS KEY IN DP T/P MUTE KT DTMF OSC. TFKD Low
300 mS
2
R/P
3
TOFD
TKID
MB MB
TIDP TPDP TP
TPDP
OSCILLATION
OSCILLATION
Figure 4. Pause Function Timing Diagram
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W91530N SERIES
Timing Waveforms, continued
HKS KEY IN DP T/P MUTE
< 600 mS
300 mS
TOFD
2 TKID
MB
*/T
3
TPDP TP TIDP KT DTMF OSC. TFKD TITP
OSCILLATION
OSCILLATION
Figure 5(a). Pulse-to-tone Timing Diagram (except W91534AN)
HKS TKRD KEY IN DP T/P MUTE KT DTMF TITP OSC.
OSCILLATION
4 TKID
MB
*/T
2 TKID
TIDP TPDP
TITP
OSCILLATION
Figure 5(b). Pulse-to-tone Timing Diagram (W91534AN only)
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Publication Release Date: May 1997 Revision A3
W91530N SERIES
Timing Waveforms, continued
HKS KEY IN DP F TKID
Low F F 3
TFP TFB
HFI HFO T/P MUTE KT DTMF
TFB
TITP OSC. OSCILLATION
Figure 6. Flash Timing Diagram
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W91530N SERIES
Headquarters
No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792697 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27516023 FAX: 852-27552064
Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab.
2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502
Note: All data and specifications are subject to change without notice.
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Publication Release Date: May 1997 Revision A3

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